FPGA programming with VHDL: A laboratory for the students in the Switching Theory and Digital Design course 2023 (English)Independent thesis Basic level (degree of Bachelor), 10 credits / 15 HE creditsStudent thesis [Artistic work]

Abstract [en]

This thesis aims to create effective and comprehensive learning materials for students enrolled in the Switching Theory and Digital Design course. The lab is designed to enable students to program an FPGA using VHDL in the Quartus programming environment to control traffic intersections with sensors and traffic signals. This laboratory aims to provide students with practical experience in digital engineering design and help them develop the necessary skills to program and implement state machines for regulating traffic environments

Place, publisher, year, edition, pages

2023. , p. 71

Keywords [en]

FPGA Field-Programmable Gate Arrays VHDL Very High-Speed Integrated Circuits HDL Hardware description language LUT Look-up-table CLB Configurable Logic Blocks MUX Multiplexers IOB Input/Output Blocks DUT Device under the test ASIC Application-specific integrated circuits SOC System on chips RTL Register Transfer Language

National Category

Engineering and Technology

Identifiers

URN: urn:nbn:se:hh:diva-51020OAI: oai:DiVA.org:hh-51020DiVA, id: diva2:1774953

Educational program

Computer Science and Engineering, 300 credits

Supervisors

Examiners

Available from: 2023-06-20 Created: 2023-06-26 Last updated: 2025-10-01Bibliographically approved

Open Access in DiVA

By organisation

Halmstad University

On the subject

Engineering and Technology

Search outside of DiVA

GoogleGoogle ScholarTotal: 693 downloadsTotal: 320 hits