The everlasting pursuit of process miniaturization causes inherent security vulnerabilities, as the increasing complexity of Integrated Circuit (IC) manufacturing forces companies to outsource production, exposing ICs to unauthorized modifications, commonly referred to as Hardware Trojans (HTs). The outsourcing allows adversaries to gather detailed IC information, which may be leveraged for malicious intents using HTs. An additional side-effect of process miniaturization is increasing Process Variation (PV) levels, creating non-deterministic attributes in modern ICs technologies, allowing the concealment of HTs. While numerous successful HT detection techniques utilizing Side-Channel Analysis (SCA) and on-chip temperature sensors have been proposed in contemporary research, such methods often assume the complete integrity of sensor data, rendering them susceptible to HTs manipulating the data used in detection decisions. Recent research has introduced a HT that manipulates temperature sensor data, potentially enabling the launch of Performance Degradation (PD) attacks. However, this study overlooks PV and sensor noise, limiting opportunities to mask HT behavior. This thesis explores the security implications of aggressive process miniaturization by attempting to mask HT attacks within the inherited side-effects. To explore this theory, two proposed HTs are designed and simulated using Core and Memory interval Thermal (CoMeT), demonstrating a 63%-73% PD while remaining indistinguishable from Trojan Free (TF) ICs across multiple HT detection methods.