hh.sePublikasjoner
Endre søk
Begrens søket
22232425 1201 - 1209 of 1209
RefereraExporteraLink til resultatlisten
Permanent link
Referera
Referensformat
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Annet format
Fler format
Språk
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Annet språk
Fler språk
Utmatningsformat
  • html
  • text
  • asciidoc
  • rtf
Treff pr side
  • 5
  • 10
  • 20
  • 50
  • 100
  • 250
Sortering
  • Standard (Relevans)
  • Forfatter A-Ø
  • Forfatter Ø-A
  • Tittel A-Ø
  • Tittel Ø-A
  • Type publikasjon A-Ø
  • Type publikasjon Ø-A
  • Eldste først
  • Nyeste først
  • Skapad (Eldste først)
  • Skapad (Nyeste først)
  • Senast uppdaterad (Eldste først)
  • Senast uppdaterad (Nyeste først)
  • Disputationsdatum (tidligste først)
  • Disputationsdatum (siste først)
  • Standard (Relevans)
  • Forfatter A-Ø
  • Forfatter Ø-A
  • Tittel A-Ø
  • Tittel Ø-A
  • Type publikasjon A-Ø
  • Type publikasjon Ø-A
  • Eldste først
  • Nyeste først
  • Skapad (Eldste først)
  • Skapad (Nyeste først)
  • Senast uppdaterad (Eldste først)
  • Senast uppdaterad (Nyeste først)
  • Disputationsdatum (tidligste først)
  • Disputationsdatum (siste først)
Merk
Maxantalet träffar du kan exportera från sökgränssnittet är 250. Vid större uttag använd dig av utsökningar.
  • 1201.
    Zeiner, Alain
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE).
    Improvement of Mass Spectrometry Protein Identification2005Independent thesis Advanced level (degree of Master (One Year))Oppgave
  • 1202.
    Zhang, Chi
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE).
    Tic-tac-toe game design based on Xilinx FPGA2010Independent thesis Basic level (degree of Bachelor), 15 poäng / 22,5 hpOppgave
    Abstract [en]

    This design accomplished Tic-Tac-Toe game on Xilinx Spartan-IIE FPGA platformin VHDL. Firstly, designing the circuits and wiring on experiment board. Secondly,designing the algorithm and programming it in Active-HDL. Thirdly, synthesizingit in Synplicity Synplify Pro and then implementing it in Xilinx ISE developingsuite. Finally download it onto FPGA to run it.

    This design allows two players to play Tic-Tac-Toe game on the experiment board.Pressing the key, the corresponding LED will be light up to represent thechessman. There are two LEDs indicate whose turn next is. If the grid one wantsto place chessman has been taken up, then LCD will alarm it and ask the playerto replace it. The first player who forms 3 chessmen in a row, column or diagonalwins, LCD will display it and the three LEDs in the winning line will blink. If nobody wins after filling the whole chessboard, then LCD displays draw.

  • 1203.
    Zhang, Yan
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE).
    Patch Antenna for 1420MHz Radio Telescope2007Independent thesis Advanced level (degree of Master (One Year))Oppgave
    Abstract [en]

    Patch antenna is one of the most rapidly popular topics in the antenna field in the past twenty years. In high-performance aircraft, spacecraft, satellite and missile applications, where size, weight, cost, performance, ease of installation, and aerodynamic profile are constraints, low profile antennas may be required. [7].

    The project is to develop a single patch antenna operating on a specific frequency 1420MHz. The frequencies near to 1420MHz are worth to observe because the hydrogen in throughout of the space can be mapped by the observation of the 21 – cm wavelength line which is corresponding to 1420 MHz radiation. The final product antenna will be used in a radio telescope as a part of the signal receiving system.

    The work within the project contains simulation, fabrication and test of final antenna. The simulation work was carried out in advanced design system which is developed by Agilent technologies, USA. The most different feature of the project is that, comparing to normal patch antenna, usually 50 ohms is selected as the matching impedance, while in this project we made it conjugate to the input impedance of the LNA. In this way we can save extra components, as well as energy consuming.

  • 1204.
    Zhiqiang, Gao
    et al.
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE).
    Liwei, Ren
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE).
    Development of a lab instrument management system2012Independent thesis Basic level (degree of Bachelor), 10 poäng / 15 hpOppgave
    Abstract [en]

    The overall goal of this project is to make the management of a large number of instruments easy at the Halmstad University workshop. An increase in the number of items borrowed needs to be managed. A lab instruments management system is developed and applied to manage the tools and instruments. The focus of the software is on managing information on borrowed instruments. The methods used come from the field of Java web application and include the methods object oriented programming, MySQL database, three-tier architecture and model-view-controller design pattern.The development of the management system is based on four features. Two features are maintenance of basic information of borrowers and instruments. The results showed that administrators can add, modify, delete, and query information of borrowers and instruments through web pages. The third feature is to borrow instruments, return instruments and to extend borrowing time. The last feature is to show statistics.The management system of instruments provides a multi-user platform for allowing the administrators to maintain user information and instrument information and helps the borrower to borrow, return and extend borrowing time. Simple statistical functions are implemented.

  • 1205.
    ZHOU, XI
    et al.
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE).
    LUO, YAOYAO
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE).
    Implementation of Hierarchical Temporal Memory on a Many-core Architecture2013Independent thesis Advanced level (degree of Master (Two Years)), 20 poäng / 30 hpOppgave
    Abstract [en]

    This thesis makes use of a many-core architecture developed by the Adapteva Company toimplement a parallel version of the Hierarchical Temporal Memory Cortical LearningAlgorithm (HTM CLA). The HTM algorithm is a new machine learning model which ispromising in the aspect of pattern recognition and inference. Due to its complexity,sufficiently large simulations are time-consuming to perform on sequential processor,therefore, in this thesis we have investigated the feasibility of using many-core processors torun HTM simulations.In this thesis, a parallel implementation of the HTM algorithm on the proposed many-coreplatform has been done in C. In order to evaluate the performance of parallel implementation,some metrics such as speedup, efficiency and scalability have been measured throughperforming some simple pattern recognition tasks. Implementing the HTM algorithm on asingle-core computer established the baseline to calculate the speedup and efficiency ofparallel implementation for the purpose of evaluating scalability.In this thesis, three mapping methods which are block-based, column-based and row-based,have been selected to parallelize the HTM from many mapping methods. In the experimentwith small training examples, the row-based mapping method gained the best performancewith a high speedup because of the lesser influence of training example variability, andreflected a good scalability when implemented on different numbers of cores. However, theexperiment with a relatively large amount of training examples gives almost identical resultsfrom all three mapping methods. In contrast with the small experiment, the full set experimentused much more diverse input and the mapping method did not influence the average runningtime for this training set. All three mappings have showed almost perfect scalability and thereis linear speedup increasing with number of cores, for the dataset and HTM size used.

  • 1206.
    Åhlander, Anders
    et al.
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE), Halmstad Embedded and Intelligent Systems Research (EIS), Centrum för forskning om inbyggda system (CERES).
    Hellsten, H.
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE).
    Lind, K.
    Saab Microwave Systems, Gothenburg, Sweden.
    Lindgren, J.
    Saab Microwave Systems, Gothenburg, Sweden.
    Svensson, Bertil
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE), Halmstad Embedded and Intelligent Systems Research (EIS), Centrum för forskning om inbyggda system (CERES).
    Architectural challenges in memory-intensive, real-time image forming2007Inngår i: International Conference on Parallel Processing, 2007. ICPP 2007 / [ed] Li Jiandong, IEEE Press, 2007, s. 35-45Konferansepaper (Fagfellevurdert)
    Abstract [en]

    The real-time image forming in future, high-end synthetic aperture radar systems is an example of an application that puts new demands on computer architectures. The initial question is whether it is at all possible to meet the demands with state-of-the-art technology or foreseeable new technology. It is therefore crucial to understand the computational flow, with its associated memory, bandwidth and processing demands. In this paper we analyse the application in order to, primarily, understand the algorithms and identify the challenges they present on a basic architectural level. The processing in the radar system is characterized by working on huge data sets, having complex memory access patterns, and doing real-time compensations for flight path errors. We propose algorithm solutions and execution schemes in interplay with a two-level (coarse-grain/fine-grain) system parallelization approach, and we provide approximate models on which the demands are quantified. In particular, we consider the choice of method for the performance-intensive data interpolations. This choice presents a trade-off problem between computational performance and size of working memory. The results of this "upstream" study will serve as a basis for further, more detailed architecture studies.

  • 1207.
    Åkesson, Rikard
    et al.
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE).
    Lindvall, Olle
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE).
    Intranät som Informationssystem2007Independent thesis Basic level (degree of Bachelor)Oppgave
    Abstract [sv]

    Informationssystemen är idag något som tar allt större plats i företagen världen över. Detta märkts framförallt genom de stora summor som varje år spenderas på olika former av informationssystem. Denna uppsats har lagt fokus på intranät som informationssystem. Syftet är att kartlägga hur ett företag använder intranät för att sprida information. Vidare granskar vi även kopplingarna mellan hur användningsgrad och informationsinnehåll påverkar informationsspridningen i ett företag. Vi har arbetat med företaget SKF där vi har utfört intervjuer med personal för att kunna få en uppfattning kring vad de själva anser om sitt intranät samt hur det används i företaget. Det empiriska material som samlats in har analyserats och presenterats ihop med teoretiska referenser. I slutet av uppsatsen presenterar vi våra egna tankar och slutsatser kring hur ett intranät bör stödja ett företag samt hur SKF lever upp till det samma.

  • 1208.
    Öhrwall, Jörgen
    et al.
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE).
    Larsson, Anders
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE).
    Prototypframtagning med MSD Matlab-Simulink-DSP: Prototype-development with MSD Matlab-Simulink-DSP2000Independent thesis Basic level (degree of Bachelor)Oppgave
    Abstract [sv]
    To reduce the cost of development to a minimum and secure delivery in software projects is a very anxious objective. A special kind of computer systems, are the so-called embedded systems. These systems often perform some sort of control. There are often the control-technician and not the programmer who develops these systems. The system-developer will be able to programme in a graphical and well-known, mathematical tool -Simulink. This will lead to that the development-time will decrease. The aim of this project is to adapt Simulink and Real-Time Workshop, so that a Simulink-model can be transferred and executed on a stand-alone hardware. This hardware has been developed by Halmstad University and Chalmers University of Technology.
  • 1209.
    önder, gül
    et al.
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE).
    kayacık, aydın
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE).
    Multiview Face Detection Using Gabor Filter and Support Vector Machines2008Independent thesis Basic level (degree of Bachelor)Oppgave
    Abstract [en]

    Face detection is a preprocessing step for face recognition algorithms. It is the localization of face/faces in an image or image sequence. Once the face(s) are localized, other computer vision algorithms such as face recognition, image compression, camera auto focusing etc are

    applied. Because of the multiple usage areas, there are many research efforts in face processing. Face detection is a challenging computer vision problem because of lighting conditions, a high degree of variability in size, shape, background, color, etc. To build fully

    automated systems, robust and efficient face detection algorithms are required.

    Numerous techniques have been developed to detect faces in a single image; in this project we have used a classification-based face detection method using Gabor filter features. We have designed five frequencies corresponding to eight orientations channels for extracting facial features from local images. The feature vector based on Gabor filter is used as the input of the face/non-face classifier, which is a Support Vector Machine (SVM) on a reduced feature

    subspace extracted by using principal component analysis (PCA).

    Experimental results show promising performance especially on single face images where 78% accuracy is achieved with 0 false acceptances.

22232425 1201 - 1209 of 1209
RefereraExporteraLink til resultatlisten
Permanent link
Referera
Referensformat
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Annet format
Fler format
Språk
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Annet språk
Fler språk
Utmatningsformat
  • html
  • text
  • asciidoc
  • rtf