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  • 1.
    Agelis, Sacki
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE), Halmstad Embedded and Intelligent Systems Research (EIS).
    Reconfigurable Optical Interconnection Networks for High-Performance Embedded2005Licentiatavhandling, med artikler (Annet vitenskapelig)
    Abstract [en]

    In embedded computer and communication system the capacity demand for interconnection networks is increasing continuously in order to achieve high-performance systems. Recent breakthroughs show that by using reconfigurability inside a single chip substantial performance gains can be added. However, in this thesis the focus is on system level reconfigurability (between chips or modules) and the performance gains that potentially can be achieved by having support for runtime reconfigurability on the system level.This thesis addresses the field of runtime system level reconfigurability with the use of optics in switches and routers for data- and telecommunications, and in multi-processor systems used for embedded signal processing. Several reconfigurable systems for switching and routing with support to adapt for asymmetric traffic patterns are proposed and compared to identify how design choices affect flexibility, performance etc. The proposed solutions are characterized by their multistage optical interconnection networks with reconfigurable shuffle patterns, where the reconfigurability is provided by micro-optical-electrical mechanical systems. More specifically, application-specific bottlenecks can be resolved by reconfiguring the interconnection network according to the current application demands. The benefits of the architectural solutions are confirmed by simulations that clearly show that the architectures can achieve high performance for both symmetric application characteristics and for several classes of asymmetric application characteristics. The final architectural solution is characterized by electronic packet-switches interconnected through an optical backplane, which is reconfigurable. Moreover, the thesis presents how several signal processing applications can be mapped to run concurrently in a time-shared scheme on a single reconfigurable multi-processor system that has high flexibility to adapt for the application currently at hand. The interconnection network is then adapted (reconfigured) according to the demands of the currently executed application in each time instance. The analysis shows that it is feasible to build such a system with today’s components.

  • 2.
    Agelis, Sacki
    et al.
    Högskolan i Halmstad, Akademin för informationsteknologi, Halmstad Embedded and Intelligent Systems Research (EIS).
    Jacobsson, Sofia
    Högskolan i Halmstad, Akademin för informationsteknologi, Halmstad Embedded and Intelligent Systems Research (EIS).
    Jonsson, Magnus
    Högskolan i Halmstad, Akademin för informationsteknologi, Halmstad Embedded and Intelligent Systems Research (EIS).
    Alping, Arne
    Ericsson Microwave Systems, Mölndal, Sweden.
    Ligander, Per
    Ericsson Microwave Systems, Mölndal, Sweden.
    Modular interconnection system for optical PCB and backplane communication2002Inngår i: Parallel and Distributed Processing Symposium., Proceedings International, IPDPS 2002, Abstracts and CD-ROM, Los Alamitos, Calif.: IEEE Press, 2002, s. 245-250Konferansepaper (Fagfellevurdert)
    Abstract [en]

    This paper presents a way of building modular systems with a powerful optical interconnection network. Each module, placed on a Printed Circuit Board (PCB), has a generic optical communication interface with a simple electronic router. Together with optical switching using micro-electromechanical system (MEMS) technology, packet switching over reconfigurable topologies is possible. The interconnection system gives the possibility to integrate electronics with optics without changing existing PCB technology. Great interest from industry is therefore expected and the cost advantages are several: reuse of module designs, module upgrades without changing the PCB, low-cost conventional PCB technology, etc. In the version described in this paper, the interconnection system has 48 bidirectional optical channels for intra-PCB communication on each board. For inter-PCB communication, a backplane with 192 bidirectional optical channels supports communication between twelve PCBs. With 2.5 Gbit/s per optical channel in each direction, the aggregated intra-PCB bit rate is 120 Gbit/s full duplex (on each PCB) while the aggregated inter-PCB bit rate is 480 Gbit/s full duplex. A case study shows the feasibility of the interconnection system in a parallel processing system for radar signal processing.

  • 3.
    Agelis, Sacki
    et al.
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE), Halmstad Embedded and Intelligent Systems Research (EIS).
    Jonsson, Magnus
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE), Halmstad Embedded and Intelligent Systems Research (EIS).
    Optoelectronic router with a reconfigurable shuffle network based on micro-optoelectromechanical systems2004Inngår i: Journal of Optical Networking, ISSN 1536-5379, Vol. 4, nr 1, s. 1-10Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    An optoelectronic router with a shuffle exchange network is presented and enhanced by the addition of micro-optoelectromechanical systems (MOEMS) in the network to add the ability to reconfigure the shuffle network. The MOEMS described here are fully connected any-to-any crossbar switches. The added reconfigurability provides the opportunity to adapt the system to different common application characteristics. Two representative application models are described: The first has symmetric properties, and the second has asymmetric properties. The router system is simulated with the specified applications and an analysis of the results is carried out. By use of MOEMS in the optical network, and thus reconfigurability, greater than 50% increased throughput performance and decreased average packet delay are obtained for the given application. Network congestion is avoided throughout the system if reconfigurability is used.

  • 4.
    Agelis, Sacki
    et al.
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE), Halmstad Embedded and Intelligent Systems Research (EIS).
    Jonsson, Magnus
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE), Halmstad Embedded and Intelligent Systems Research (EIS).
    Optoelectronic router with MOEMS–based reconfigurable shuffle network2004Konferansepaper (Fagfellevurdert)
  • 5.
    Agelis, Sacki
    et al.
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE), Halmstad Embedded and Intelligent Systems Research (EIS), Centrum för forskning om inbyggda system (CERES).
    Jonsson, Magnus
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE), Halmstad Embedded and Intelligent Systems Research (EIS), Centrum för forskning om inbyggda system (CERES).
    Reconfigurable optical interconnection system supporting concurrent application-specific parallel computing2005Inngår i: 17th Symposium on Computer Architecture and High Performance Computing: SBAC-PAD 2005 : proceedings : 24-27 October, 2005, Rio de Janeiro, PR, Brazil / [ed] Claudio L. Amorim, Washington, DC, USA: IEEE Computer Society, 2005, s. 44-51Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Application specific architectures are highly desirable in embedded parallel computing systems at the same time as designers strive for using one embedded parallel computing platform for several applications. If this can be achieved, the cost can be decreased in comparison to using several different embedded parallel computing systems. This paper presents a novel approach of running several high-performance applications concurrently on one single parallel computing system. By using a reconfigurable backplane interconnection system, the applications can be run efficiently with high network flexibility since the interconnect network can be adapted to fit the application that is being processed for the moment. More precisely, this paper investigates how the space time adaptive processing (STAP) radar algorithm and the stripmap synthetic aperture radar (SAR) algorithm can be mapped on a multi-cluster processing system with a reconfigurable optical interconnection system realized by a micro-optical-electrical mechanical system (MOEMS) crossbars. The paper describes the reconfigurable platform, the two algorithms and how they individually can be mapped on the targeted multiprocessor system. It is also described how these two applications can be mapped simultaneously on the optical reconfigurable platform. Implications and requirements on communication bandwidth and processor performance in different critical points of the two applications are presented. The results of the analysis show that an implementation is feasible with today's MOEMS technology, and that the two applications can be successfully run in a time-sharing scheme, both at the processing side and at the access for interconnection bandwidth.

  • 6.
    Agelis, Sacki
    et al.
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE), Halmstad Embedded and Intelligent Systems Research (EIS).
    Jonsson, Magnus
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE), Halmstad Embedded and Intelligent Systems Research (EIS).
    System-Level Runtime Reconfigurablity - Optical Interconnection Networks for Switching Applications2004Inngår i: Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'04 / [ed] Toomas P Plaks & M Gokhale, Athens, USA: CSREA Press, 2004, s. 155-162Konferansepaper (Fagfellevurdert)
    Abstract [en]

    The performance requirements on data and telecommunication switches and routers are continuously increasing and it is evident that new ideas and architectures must come to light to satisfy these new demands. In this paper, a runtime reconfigurable modular design approach is presented, using state-of-the-art microoptical-electrical mechanical system (MOEMS) components. The paper introduces a novel field of reconfigurability, where reconfiguration is made on the system level instead of, e.g. fine-granularity reconfigurable logic. Different reconfigurable system solutions with support to adapt for asymmetric traffic patterns are proposed and compared to see how design choices affect flexibility, performance etc. The proposed solutions are characterized by their multistage networks with reconfigurable shuffle patterns.

  • 7.
    Agelis, Sacki
    et al.
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE), Halmstad Embedded and Intelligent Systems Research (EIS).
    Jonsson, Magnus
    Högskolan i Halmstad, Sektionen för Informationsvetenskap, Data– och Elektroteknik (IDE), Halmstad Embedded and Intelligent Systems Research (EIS).
    Visualizing the Potential of Reconfigurable Shuffle-Patterns in Optoelectronic Routers by the Use of MOEMS2004Inngår i: Proceedings of the IASTED International Conference Communication Systems and Networks / [ed] Salvador C.E.P., Calgary, Canada: ACTA Press, 2004, s. 148-154Konferansepaper (Fagfellevurdert)
    Abstract [en]

    A reconfigurable high performance multistage router architecture is presented and simulated. The router backbone network is an optical shuffle exchange network that has the power of reconfigurability through the use of micro-optical-electrical mechanical systems (MOEMS). The router is subjected to different application classes. The application classes have different characteristics in terms of symmetric/asymmetric traffic properties. We compare our reconfigurable shuffle-pattern for all three application classes for the specified router architecture.

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