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Pulse code compression in Field Programmable Gate Arrays for radar signal processing
Halmstad University, School of Information Science, Computer and Electrical Engineering (IDE).
Halmstad University, School of Information Science, Computer and Electrical Engineering (IDE).
2003 (Swedish)Independent thesis Basic level (degree of Bachelor)Student thesis
Abstract [sv]
This project has been initiated by Ericsson Microwave Systems AB in Mölndal, Sweden. The fast development of FPGA’s, both regarding to the logic capacity and speed has made them an interesting alternative to implement parts of digital signal processing to be used in the new airborne radar equipment. The mission was to examine whether an FPGA-based solution meets the demands which are required on the multiple channel digital signal processing in adaptive phased array antenna systems. The part of the signal processing chain that was studied is the pulse code compression represented as binary phase modulation coded with a Barker13 code. The pulse code compression was implemented as parallel FIR-filters on the FPGA circuits. The project shows that FPGA’s are suitable to implement multiple channel pulse code compression in a cost efficient manner.
Place, publisher, year, edition, pages
2003.
Keyword [sv]
VHDL, FPGA, Signalbehandling, Pulskompression, FIR, filter, Active-HDL
Identifiers
URN: urn:nbn:se:hh:diva-11387Local ID: U10406OAI: oai:DiVA.org:hh-11387DiVA: diva2:366518
Uppsok
Technology
Note
Denna uppsats kan beställas från arkivet / This paper can be ordered from the archive. Kontakta / Contact: arkivet@hh.seAvailable from: 2010-11-09 Created: 2010-11-09Bibliographically approved

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