Framtagning av ny utvecklingsplattform för VHDL 2002 (Swedish)Independent thesis Basic level (degree of Bachelor)Student thesis

Abstract [sv]

This Bachelors thesis describes a project aimed at investigating a new development kit for a course in VHDL, which includes both hardware and software. The project was developed for the University of Halmstad. For the software part of the project the goal was to find and evaluate programs that are easier to use than today’s software. The software evaluation consisted of Active HDL, EASE, Modelsim, Synplify och Xilinx Webpack. The hardware part focused on finding a more powerful and scaleable development board. The conclusion is that Active-HDL, Synplify and Webpack together with Xilinx Spartan-II demo board is the most intuitive combination.

Place, publisher, year, edition, pages

2002.

Keywords [sv]

VHDL, FPGA, Spartan-II, Xilinx, Active-HDL, Modelsim, EASE, Synplify, Hårdvara

Identifiers

URN: urn:nbn:se:hh:diva-10420Local ID: U5302OAI: oai:DiVA.org:hh-10420DiVA, id: diva2:365539

Uppsok

Technology

Note

Denna uppsats kan beställas från arkivet / This paper can be ordered from the archive. Kontakta / Contact: arkivet@hh.seAvailable from: 2010-11-09 Created: 2010-11-09Bibliographically approved

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School of Information Science, Computer and Electrical Engineering (IDE)

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