Scale : FPGA

Agelis, Sacki; Andersson, Thomas

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Scale: FPGA

Agelis, Sacki

Halmstad University, School of Information Science, Computer and Electrical Engineering (IDE).

Andersson, Thomas

Halmstad University, School of Information Science, Computer and Electrical Engineering (IDE).

2000 (Swedish)Independent thesis Basic level (degree of Bachelor)Student thesis

Abstract [sv]

Implementation of the Scale algorithm in VHDL, to make a fully functional FPGA module with complete ekvivalency to the software given. The algorithm discribes a process to reduce fuel comsumption and increases the effect of the engine.

Place, publisher, year, edition, pages

2000.

Keywords [sv]

VHDL, implementation, scale, sacki, thomas, engine control

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URN: urn:nbn:se:hh:diva-8931Local ID: U3188OAI: oai:DiVA.org:hh-8931DiVA, id: diva2:364021

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Technology

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Denna uppsats kan beställas från arkivet / This paper can be ordered from the archive. Kontakta / Contact: arkivet@hh.seAvailable from: 2010-11-09 Created: 2010-11-09Bibliographically approved

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