JTAG Boundary Scan 2000 (Swedish)Independent thesis Basic level (degree of Bachelor)Student thesis

Abstract [sv]

When a printed circuit board have bean developed and designed, it have to be tested in order to verify that solderings, wires between circuits and the placement of components are correct. Nowadays a new kind of componentpackage is being used more and more in designs, the so-called BGA (Ball Grid Array) on witch the component-connections constitute a quantity of small balls. When using these packages a testfixture can no longer be used. Besides, a testfixture is very expensive to manufacter. These new problems have subdued the development of the IEEE 1149.1 JTAG Boundary Scan standard. The standard permits electric testing of PCB's with all of the I/O-cells on the PCB connected together to form a long shiftregister. Our work with the project have consisted of designing a prototype of a JTAG Boundary Scan controllercard, with the aim in being a cheap and simple alternative to the already existing "top-of-the-line"-products.

Place, publisher, year, edition, pages

2000.

Identifiers

URN: urn:nbn:se:hh:diva-8928Local ID: U3185OAI: oai:DiVA.org:hh-8928DiVA, id: diva2:364018

Uppsok

Technology

Note

Denna uppsats kan beställas från arkivet / This paper can be ordered from the archive. Kontakta / Contact: arkivet@hh.seAvailable from: 2010-11-09 Created: 2010-11-09Bibliographically approved

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School of Information Science, Computer and Electrical Engineering (IDE)

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