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A Domain-specific Approach for Software Development on Manycore Platforms
Halmstad University, School of Information Science, Computer and Electrical Engineering (IDE), Halmstad Embedded and Intelligent Systems Research (EIS), Centre for Research on Embedded Systems (CERES).
Halmstad University, School of Information Science, Computer and Electrical Engineering (IDE), Halmstad Embedded and Intelligent Systems Research (EIS), Centre for Research on Embedded Systems (CERES).ORCID iD: 0000-0001-6625-6533
2008 (English)In: SIGARCH Computer Architecture News, ISSN 0163-5964, E-ISSN 1943-5851, Vol. 36, no 5, p. 2-10Article in journal (Refereed) Published
Abstract [en]

The programming complexity of increasingly parallel processors calls for new tools that assist programmers in utilising the parallel hardware resources. In this paper we present a set of models that we have developed as part of a tool for mapping dataflow graphs onto manycores. One of the models captures the essentials of manycores identified as suitable for signal processing, and which we use as target for our algorithms. As an intermediate representation we introduce timed configuration graphs, which describe the mapping of a model of an application onto a machine model. Moreover, we show how a timed configuration graph by very simple means can be evaluated using an abstract interpretation to obtain performance feedback. This information can be used by our tool and by the programmer in order to discover improved mappings.

Place, publisher, year, edition, pages
New York: ACM Press, 2008. Vol. 36, no 5, p. 2-10
Keywords [en]
Programming, Manycores
National Category
Computer Engineering
Identifiers
URN: urn:nbn:se:hh:diva-5990DOI: 10.1145/1556444.1556446OAI: oai:DiVA.org:hh-5990DiVA, id: diva2:353080
Conference
Association for Computing Machinery Special Interest Group on Computer Architecture
Available from: 2010-09-23 Created: 2010-09-23 Last updated: 2018-03-23Bibliographically approved
In thesis
1. Models and Methods for Development of DSP Applications on Manycore Processors
Open this publication in new window or tab >>Models and Methods for Development of DSP Applications on Manycore Processors
2009 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

Advanced digital signal processing systems require specialized high-performance embedded computer architectures. The term high-performance translates to large amounts of data and computations per time unit. The term embedded further implies requirements on physical size and power efficiency. Thus the requirements are of both functional and non-functional nature. This thesis addresses the development of high-performance digital signal processing systems relying on manycore technology. We propose building two-level hierarchical computer architectures for this domain of applications. Further, we outline a tool flow based on methods and analysis techniques for automated, multi-objective mapping of such applications on distributed memory manycore processors. In particular, the focus is put on how to provide a means for tunable strategies for mapping of task graphs on array structured distributed memory manycores, with respect to given application constraints. We argue for code mapping strategies based on predicted execution performance, which can be used in an auto-tuning feedback loop or to guide manual tuning directed by the programmer. Automated parallelization, optimisation and mapping to a manycore processor benefits from the use of a concurrent programming model as the starting point. Such a model allows the programmer to express different types and granularities of parallelism as well as computation characteristics of importance in the addressed class of applications. The programming model should also abstract away machine dependent hardware details. The analytical study of WCDMA baseband processing in radio base stations, presented in this thesis, suggests dataflow models as a good match to the characteristics of the application and as execution model abstracting computations on a manycore. Construction of portable tools further requires a manycore machine model and an intermediate representation. The models are needed in order to decouple algorithms, used to transform and map application software, from hardware. We propose a manycore machine model that captures common hardware resources, as well as resource dependent performance metrics for parallel computation and communication. Further, we have developed a multifunctional intermediate representation, which can be used as source for code generation and for dynamic execution analysis. Finally, we demonstrate how we can dynamically analyse execution using abstract interpretation on the intermediate representation. It is shown that the performance predictions can be used to accurately rank different mappings by best throughput or shortest end-to-end computation latency.

Place, publisher, year, edition, pages
Göteborg: Chalmers University of Technology, 2009. p. 173
Series
Doktorsavhandlingar vid Chalmers tekniska högskola. Ny serie, ISSN 0346-718X ; 2969
Keywords
parallel processing, manycore processors, high-performance digital signal processing, dataflow, concurrent models of computation, parallel code mapping, parallel machine model, dynamic performance analysis
National Category
Computer Engineering
Identifiers
urn:nbn:se:hh:diva-14706 (URN)978-91-7385-288-3 (ISBN)
Public defence
2009-06-10, Wigforssalen, house Visionen, Halmstad University, Kristian IV:s väg 3, Halmstad, 13:15 (English)
Opponent
Supervisors
Available from: 2011-04-20 Created: 2011-04-04 Last updated: 2018-03-23Bibliographically approved

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Bengtsson, JerkerSvensson, Bertil

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