hh.sePublications
Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
Advancing IoT Security Through Run-time Monitoring & Post-Execution Verification
North Carolina A&T State University, Department of Computer Systems Technology, Greensboro, United States.
Halmstad University, School of Information Technology.ORCID iD: 0000-0002-2874-6256
North Carolina A&T State University, Department of Computer Systems Technology, Greensboro, United States.
2024 (English)In: Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2024 / [ed] Himanshu Thapliyal; Jürgen Becker, Washington: IEEE Computer Society, 2024, p. 825-829, article id 202914Conference paper, Published paper (Refereed)
Abstract [en]

This paper, for the first time, proposes the joint application of run-time monitoring and post-execution verification methods to protect the integrity of AES encryption on Internet-of-Things (IoT) systems against fault injection attacks. The proposed method operates on the source code of the encryption algorithm and introduces a limited number of redundant variables into the AES code before compilation to monitor and detect fault attacks at runtime. For further integrity checking, time-series analysis of the redundant variables is used as a post-execution verification method that captures the attacks not caught by run-time detection. Our combined method has been evaluated through software simulation, in which we have injected 1200 fault attacks into a running AES code. The simulation results show that the run-time monitoring and post-execution verification methods can, together, detect up to 98% of conducted fault attacks. The biggest advantage of this method is its applicability to any hardware platform without the need for additional hardware support.

© Copyright 2024 Elsevier B.V., All rights reserved.

Place, publisher, year, edition, pages
Washington: IEEE Computer Society, 2024. p. 825-829, article id 202914
Series
Proceedings (IEEE Computer Society Annual Symposium on VLSI. Online), E-ISSN 2159-3477
Keywords [en]
AES Encryption, Code Redundancy, Countermeasures, Fault Injection Attacks
National Category
Computer Sciences
Identifiers
URN: urn:nbn:se:hh:diva-54783DOI: 10.1109/ISVLSI61997.2024.00164Scopus ID: 2-s2.0-85206127269OAI: oai:DiVA.org:hh-54783DiVA, id: diva2:1907390
Conference
2024 IEEE Computer Society Annual Symposium on VLSI, Emerging VLSI Technologies and Architectures, Knoxville, USA, July 1-3, 2024
Note

This research has been partially supported by the National Science Foundation under award number 2302537.

Available from: 2024-10-22 Created: 2024-10-22 Last updated: 2025-03-17Bibliographically approved

Open Access in DiVA

No full text in DiVA

Other links

Publisher's full textScopus

Authority records

Fazeli, Mahdi

Search in DiVA

By author/editor
Fazeli, Mahdi
By organisation
School of Information Technology
Computer Sciences

Search outside of DiVA

GoogleGoogle Scholar

doi
urn-nbn

Altmetric score

doi
urn-nbn
Total: 71 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf