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An Ultra-compact Pure Magnetic Arbiter PUF with High Reliability and Low Power Consumption
Iran University of Science and Technology, Tehran, Iran.
Iran University of Science and Technology, Tehran, Iran.ORCID iD: 0000-0003-0232-9267
Shahid Bahonar University of Kerman, Kerman, Iran.
Halmstad University, School of Information Technology.ORCID iD: 0000-0002-2874-6256
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2023 (English)In: IEEE transactions on nanotechnology, ISSN 1536-125X, E-ISSN 1941-0085, Vol. 22, p. 449-456Article in journal (Refereed) Published
Abstract [en]

Due to the rugged environmental factors in IoT applications and constrained on-chip resources, PUF, as a critical hardware primitive, is a promising solution for key storage, authentication, and ID generation. The existing CMOS-based Arbiter PUFs mainly suffer from low reliability and vulnerability against modeling attacks. In this paper, the proposed PUF utilizes mCell devices, a class of Magnetoresistive devices employing only Magnetic Tunnel Junction (MTJ) devices, as a building block. Also, a novel nonvolatile latch is proposed to act as an arbiter and generates the responses by comparing the current values instead of delays which leads to increased the reliability by subtracting the constant variation rates of MTJs under environmental variation without adding hardware overhead. The characteristics of MTJ like nonvolatility, stochastic switching, chaotic magnetization, low power consumption, and low occupied area have made the proposed PUF to a low power, highly reliable, high randomness and ultra-compact pure magnetic arbiter PUF. The Monte Carlo HSPICE simulation results reveal that the uniformity, uniqueness, bit-aliasing, power consumption, and area of the proposed PUF are 49.24 %, 49.87 %, 48.64 %, 10.771 μW and 0.106 μm2, respectively. In addition, the average BER across a wide temperature range (-50C 150C) and voltage range (0.05 V-0.1 V) is 0.08 % and 0.18 %, respectively. © IEEE

Place, publisher, year, edition, pages
Piscataway, NJ: Institute of Electrical and Electronics Engineers (IEEE), 2023. Vol. 22, p. 449-456
Keywords [en]
Delays, Hardware security, Integrated circuit reliability, Logic gates, magnetic tunnel junction (MTJ), Magnetic tunneling, Physical unclonable function, physical unclonable function (PUF), Power demand, Reliability, ultra-compact
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:hh:diva-51428DOI: 10.1109/TNANO.2023.3292481ISI: 001053832700001Scopus ID: 2-s2.0-85164380950OAI: oai:DiVA.org:hh-51428DiVA, id: diva2:1788827
Available from: 2023-08-17 Created: 2023-08-17 Last updated: 2024-01-16Bibliographically approved

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Fazeli, Mahdi

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