The advanced signal processing systems of today requires extreme data throughput and low power consumption. The only way to accomplish this work is to use parallel processor architecture with efficient implementation of algorithms. The aim of this paper is to evaluate the use of a parallel processor architecture in Radar signal processing applications where the processor has to perform complex computations. The approach taken in this work is that we have implemented a parameterized version of Fast Fourier Transform (FFT) algorithm on Ambric Massivel Parallel Processor Array (MPPA) and evaluated the results in terms of resource usage, latency, and cycle count per processed output sample. The design works for any given number of inputs within the range for the given parameter values. We have concluded that the use of parametrized design approach enables us to do design space exploration between resource usage and performance benefit for Ambric architecture.