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Specifying Run-time Reconfiguration in Processor Arrays using High-level language
Halmstad University, School of Information Science, Computer and Electrical Engineering (IDE), Halmstad Embedded and Intelligent Systems Research (EIS), Embedded Systems (CERES). (CC-Lab)ORCID iD: 0000-0002-4932-4036
Halmstad University, School of Information Science, Computer and Electrical Engineering (IDE), Halmstad Embedded and Intelligent Systems Research (EIS), Embedded Systems (CERES). (CC-Lab)ORCID iD: 0000-0001-6625-6533
2010 (English)In: WRC 2010: 4th HiPEAC Workshop on Reconfigurable Computing, Pisa, 2010, p. 1-10Conference paper, Published paper (Refereed)
Abstract [en]

The adoption of run-time reconfigurable parallel architectures for high-performance embedded systems is constrained by the lackof a unified programming model which can express both parallelism and reconfigurability. We propose to program an emerging class of reconfigurable processor arrays by using the programming model of occam-pi and describe how the extensions of channel direction specifiers, mobile data, dynamic process invocation, and process placement attributes can be used to express run-time reconfiguration in occam-pi. We present implementations of DCT algorithm to demonstrate the applicability of occam-pi to express reconfigurability. We concluded that occam-pi appears to be a suitable programming model for programming run-time reconfigurable processor arrays.

Place, publisher, year, edition, pages
Pisa, 2010. p. 1-10
National Category
Computer Sciences
Identifiers
URN: urn:nbn:se:hh:diva-5442OAI: oai:DiVA.org:hh-5442DiVA, id: diva2:345708
Conference
HiPEAC Workshop on Reconfigurable Computing
Available from: 2010-09-27 Created: 2010-08-26 Last updated: 2018-01-12Bibliographically approved
In thesis
1. Programming of Coarse-Grained Reconfigurable Architectures
Open this publication in new window or tab >>Programming of Coarse-Grained Reconfigurable Architectures
2011 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

Coarse-grained reconfigurable architectures, which offer massive parallelism coupled with the capability of undergoing run-time reconfiguration, are gaining attention in order to meet not only the increased computational demands of high-performance embedded systems, but also to fulfill the need of adaptability to functional requirements of the application. This thesis focuses on the programming aspects of such coarse-grained reconfigurable computing devices, including the relevant computation models that are capable of exposing different kinds of parallelism inherent in the application and the ability of these models to capture the adaptability requirements of the application. The thesis suggests the occam-pi language for programming of a broad class of coarse-grained reconfigurable architectures as an intermediate language; we call it intermediate, since we believe that the applicationprogramming is best done in a high-level domain-specific language. The salient properties of the occam-pi language are explicit concurrency with built-in mechanisms for interprocessorcommunication, provision for expressing dynamic parallelism, support for the expression of dynamic reconfigurations, and placement attributes. To evaluate the programming approach, a compiler framework was extended to support the language extensions in the occam-pi language, and backends were developed to target two different coarse-grained reconfigurable architectures. XPP and Ambric. The results on XPP reveal that the occam-pi based implementations produce comparable throughput to those of NML programs, while programming at a much higher level of abstraction than that of NML. Similarly the two occam-pi implementations of autofocus criterion calculation targeted to the Ambric platform outperform the CPU implementation by factors of 11-23. Thus, the results of the implemented case-studies suggest that the occam-pi language based approach simplifies the development of applications employing run-time reconfigurable devices without compromising the performance benefits.

Place, publisher, year, edition, pages
Örebro: Örebro universitet, 2011
Series
Örebro Studies in Technology, ISSN 1650-8580 ; 48
National Category
Computer Sciences
Identifiers
urn:nbn:se:hh:diva-15050 (URN)
Public defence
2011-05-26, Wigforssalen, Högskolan i Halmstad, Halmstad, 10:15 (English)
Opponent
Supervisors
Available from: 2011-05-09 Created: 2011-04-28 Last updated: 2018-01-12Bibliographically approved

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Zain-ul-AbdinSvensson, Bertil

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