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Agelis, Sacki
Publications (7 of 7) Show all publications
Agelis, S. (2005). Reconfigurable Optical Interconnection Networks for High-Performance Embedded. (Licentiate dissertation). Göteborg: Chalmers tekniska högskola
Open this publication in new window or tab >>Reconfigurable Optical Interconnection Networks for High-Performance Embedded
2005 (English)Licentiate thesis, comprehensive summary (Other academic)
Abstract [en]

In embedded computer and communication system the capacity demand for interconnection networks is increasing continuously in order to achieve high-performance systems. Recent breakthroughs show that by using reconfigurability inside a single chip substantial performance gains can be added. However, in this thesis the focus is on system level reconfigurability (between chips or modules) and the performance gains that potentially can be achieved by having support for runtime reconfigurability on the system level.This thesis addresses the field of runtime system level reconfigurability with the use of optics in switches and routers for data- and telecommunications, and in multi-processor systems used for embedded signal processing. Several reconfigurable systems for switching and routing with support to adapt for asymmetric traffic patterns are proposed and compared to identify how design choices affect flexibility, performance etc. The proposed solutions are characterized by their multistage optical interconnection networks with reconfigurable shuffle patterns, where the reconfigurability is provided by micro-optical-electrical mechanical systems. More specifically, application-specific bottlenecks can be resolved by reconfiguring the interconnection network according to the current application demands. The benefits of the architectural solutions are confirmed by simulations that clearly show that the architectures can achieve high performance for both symmetric application characteristics and for several classes of asymmetric application characteristics. The final architectural solution is characterized by electronic packet-switches interconnected through an optical backplane, which is reconfigurable. Moreover, the thesis presents how several signal processing applications can be mapped to run concurrently in a time-shared scheme on a single reconfigurable multi-processor system that has high flexibility to adapt for the application currently at hand. The interconnection network is then adapted (reconfigured) according to the demands of the currently executed application in each time instance. The analysis shows that it is feasible to build such a system with today’s components.

Place, publisher, year, edition, pages
Göteborg: Chalmers tekniska högskola, 2005. p. 30
Series
Technical report. L (Department of Computer Science and Engineering, Chalmers University of Technology and Göteborg University), ISSN 1652-876X ; 4
Keywords
MOEMS, Micro-optical-electrical mechanical systems, Reconfigurable interconnection networks, Data communication, Telecommunication, Radar signal processing, Asymmetric application, Symmetric application, STAP, SAR, Embedded systems, VCSEL, Parallel processing system, Optical communication
National Category
Engineering and Technology
Identifiers
urn:nbn:se:hh:diva-373 (URN)2082/697 (Local ID)2082/697 (Archive number)2082/697 (OAI)
Presentation
2005-04-22, Wigfors, Kristian IV:s väg 3, Halmstad, 15:47 (English)
Opponent
Note

[Paper D] Agelis, Sacki, "STAP and SAR on an embedded parallel computing system with a reconfigurable interconnection systems," Research Report IDE-0537, School of Information Science, Computer and Electrical Engineering (IDE), Halmstad University, Sweden, 2004

Available from: 2007-01-10 Created: 2007-01-10 Last updated: 2018-03-23Bibliographically approved
Agelis, S. & Jonsson, M. (2005). Reconfigurable optical interconnection system supporting concurrent application-specific parallel computing. In: Claudio L. Amorim (Ed.), 17th Symposium on Computer Architecture and High Performance Computing: SBAC-PAD 2005 : proceedings : 24-27 October, 2005, Rio de Janeiro, PR, Brazil. Paper presented at 17th Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2005, 24-27 October, 2005, Rio de Janeiro, Brazil (pp. 44-51). Washington, DC, USA: IEEE Computer Society
Open this publication in new window or tab >>Reconfigurable optical interconnection system supporting concurrent application-specific parallel computing
2005 (English)In: 17th Symposium on Computer Architecture and High Performance Computing: SBAC-PAD 2005 : proceedings : 24-27 October, 2005, Rio de Janeiro, PR, Brazil / [ed] Claudio L. Amorim, Washington, DC, USA: IEEE Computer Society, 2005, p. 44-51Conference paper, Published paper (Refereed)
Abstract [en]

Application specific architectures are highly desirable in embedded parallel computing systems at the same time as designers strive for using one embedded parallel computing platform for several applications. If this can be achieved, the cost can be decreased in comparison to using several different embedded parallel computing systems. This paper presents a novel approach of running several high-performance applications concurrently on one single parallel computing system. By using a reconfigurable backplane interconnection system, the applications can be run efficiently with high network flexibility since the interconnect network can be adapted to fit the application that is being processed for the moment. More precisely, this paper investigates how the space time adaptive processing (STAP) radar algorithm and the stripmap synthetic aperture radar (SAR) algorithm can be mapped on a multi-cluster processing system with a reconfigurable optical interconnection system realized by a micro-optical-electrical mechanical system (MOEMS) crossbars. The paper describes the reconfigurable platform, the two algorithms and how they individually can be mapped on the targeted multiprocessor system. It is also described how these two applications can be mapped simultaneously on the optical reconfigurable platform. Implications and requirements on communication bandwidth and processor performance in different critical points of the two applications are presented. The results of the analysis show that an implementation is feasible with today's MOEMS technology, and that the two applications can be successfully run in a time-sharing scheme, both at the processing side and at the access for interconnection bandwidth.

Place, publisher, year, edition, pages
Washington, DC, USA: IEEE Computer Society, 2005
Series
Symposium on Computer Architecture and High Performance Computing. Proceedings, ISSN 1550-6533 ; 2005
Keywords
Embedded systems, Multiprocessor interconnection networks, Optical interconnections, Parallel programming, Reconfigurable architectures
National Category
Engineering and Technology
Identifiers
urn:nbn:se:hh:diva-414 (URN)10.1109/CAHPC.2005.35 (DOI)2-s2.0-33847235068 (Scopus ID)2082/752 (Local ID)0-7695-2446-X (ISBN)2082/752 (Archive number)2082/752 (OAI)
Conference
17th Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2005, 24-27 October, 2005, Rio de Janeiro, Brazil
Note

©2005 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.

Available from: 2007-01-23 Created: 2007-01-23 Last updated: 2018-03-23Bibliographically approved
Agelis, S. & Jonsson, M. (2004). Optoelectronic router with a reconfigurable shuffle network based on micro-optoelectromechanical systems. Journal of Optical Networking, 4(1), 1-10
Open this publication in new window or tab >>Optoelectronic router with a reconfigurable shuffle network based on micro-optoelectromechanical systems
2004 (English)In: Journal of Optical Networking, ISSN 1536-5379, Vol. 4, no 1, p. 1-10Article in journal (Refereed) Published
Abstract [en]

An optoelectronic router with a shuffle exchange network is presented and enhanced by the addition of micro-optoelectromechanical systems (MOEMS) in the network to add the ability to reconfigure the shuffle network. The MOEMS described here are fully connected any-to-any crossbar switches. The added reconfigurability provides the opportunity to adapt the system to different common application characteristics. Two representative application models are described: The first has symmetric properties, and the second has asymmetric properties. The router system is simulated with the specified applications and an analysis of the results is carried out. By use of MOEMS in the optical network, and thus reconfigurability, greater than 50% increased throughput performance and decreased average packet delay are obtained for the given application. Network congestion is avoided throughout the system if reconfigurability is used.

Place, publisher, year, edition, pages
Washington, USA: Optical Society of America, 2004
Keywords
Fiber optics, optical communications, Networks
National Category
Computer Sciences
Identifiers
urn:nbn:se:hh:diva-412 (URN)10.1364/JON.4.000001 (DOI)000233163800001 ()2-s2.0-22744433703 (Scopus ID)2082/736 (Local ID)2082/736 (Archive number)2082/736 (OAI)
Note

This paper was published in Journal of Optical Networking and is made available as an electronic reprint with the permission of OSA. Systematic or multiple reproduction or distribution to multiple locations via electronic or other means is prohibited and is subject to penalties under law.

Available from: 2007-01-18 Created: 2007-01-18 Last updated: 2018-03-23Bibliographically approved
Agelis, S. & Jonsson, M. (2004). Optoelectronic router with MOEMS–based reconfigurable shuffle network. In: : . Paper presented at Swedish National Computer Networking Workshop (SNCNW’04), Karlstad, Sweden, Nov. 23-24, 2004.
Open this publication in new window or tab >>Optoelectronic router with MOEMS–based reconfigurable shuffle network
2004 (English)Conference paper, Published paper (Refereed)
Keywords
optical interconnection networks
National Category
Computer Engineering
Identifiers
urn:nbn:se:hh:diva-2759 (URN)2082/3161 (Local ID)2082/3161 (Archive number)2082/3161 (OAI)
Conference
Swedish National Computer Networking Workshop (SNCNW’04), Karlstad, Sweden, Nov. 23-24, 2004
Available from: 2009-08-13 Created: 2009-08-13 Last updated: 2018-03-23Bibliographically approved
Agelis, S. & Jonsson, M. (2004). System-Level Runtime Reconfigurablity - Optical Interconnection Networks for Switching Applications. In: Toomas P Plaks & M Gokhale (Ed.), Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'04: . Paper presented at International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA '04, Las Vegas, Nevada, USA, June 21 - 24, 2004 (pp. 155-162). Athens, USA: CSREA Press
Open this publication in new window or tab >>System-Level Runtime Reconfigurablity - Optical Interconnection Networks for Switching Applications
2004 (English)In: Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'04 / [ed] Toomas P Plaks & M Gokhale, Athens, USA: CSREA Press, 2004, p. 155-162Conference paper, Published paper (Refereed)
Abstract [en]

The performance requirements on data and telecommunication switches and routers are continuously increasing and it is evident that new ideas and architectures must come to light to satisfy these new demands. In this paper, a runtime reconfigurable modular design approach is presented, using state-of-the-art microoptical-electrical mechanical system (MOEMS) components. The paper introduces a novel field of reconfigurability, where reconfiguration is made on the system level instead of, e.g. fine-granularity reconfigurable logic. Different reconfigurable system solutions with support to adapt for asymmetric traffic patterns are proposed and compared to see how design choices affect flexibility, performance etc. The proposed solutions are characterized by their multistage networks with reconfigurable shuffle patterns.

Place, publisher, year, edition, pages
Athens, USA: CSREA Press, 2004
Keywords
Interconnection networks, Computer networks, Optical interconnection, Switch control
National Category
Engineering and Technology
Identifiers
urn:nbn:se:hh:diva-388 (URN)000225880300021 ()2-s2.0-12744272379 (Scopus ID)2082/712 (Local ID)1-932415-42-4 (ISBN)978-193241542-1 (ISBN)2082/712 (Archive number)2082/712 (OAI)
Conference
International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA '04, Las Vegas, Nevada, USA, June 21 - 24, 2004
Available from: 2007-01-12 Created: 2007-01-12 Last updated: 2018-03-23Bibliographically approved
Agelis, S. & Jonsson, M. (2004). Visualizing the Potential of Reconfigurable Shuffle-Patterns in Optoelectronic Routers by the Use of MOEMS. In: Salvador C.E.P. (Ed.), Proceedings of the IASTED International Conference Communication Systems and Networks: . Paper presented at International Conference on Communications Systems and Networks (CSN'2004), Marbella, Spain, Sept. 1-3, 2004 (pp. 148-154). Calgary, Canada: ACTA Press
Open this publication in new window or tab >>Visualizing the Potential of Reconfigurable Shuffle-Patterns in Optoelectronic Routers by the Use of MOEMS
2004 (English)In: Proceedings of the IASTED International Conference Communication Systems and Networks / [ed] Salvador C.E.P., Calgary, Canada: ACTA Press, 2004, p. 148-154Conference paper, Published paper (Refereed)
Abstract [en]

A reconfigurable high performance multistage router architecture is presented and simulated. The router backbone network is an optical shuffle exchange network that has the power of reconfigurability through the use of micro-optical-electrical mechanical systems (MOEMS). The router is subjected to different application classes. The application classes have different characteristics in terms of symmetric/asymmetric traffic properties. We compare our reconfigurable shuffle-pattern for all three application classes for the specified router architecture.

Place, publisher, year, edition, pages
Calgary, Canada: ACTA Press, 2004
Keywords
MOEMS, VCSEL, Switch, Router, Application, Reconfigurability
National Category
Telecommunications
Identifiers
urn:nbn:se:hh:diva-391 (URN)000228555100027 ()2-s2.0-11144308898 (Scopus ID)2082/715 (Local ID)0-88986-450-0 (ISBN)2082/715 (Archive number)2082/715 (OAI)
Conference
International Conference on Communications Systems and Networks (CSN'2004), Marbella, Spain, Sept. 1-3, 2004
Available from: 2007-01-12 Created: 2007-01-12 Last updated: 2018-03-23Bibliographically approved
Agelis, S., Jacobsson, S., Jonsson, M., Alping, A. & Ligander, P. (2002). Modular interconnection system for optical PCB and backplane communication. In: Parallel and Distributed Processing Symposium., Proceedings International, IPDPS 2002, Abstracts and CD-ROM: . Paper presented at the 16th International Parallel and Distributed Processing Symposium, April 15-19, 2002, Ft. Lauderdale, Florida, USA (pp. 245-250). Los Alamitos, Calif.: IEEE Press
Open this publication in new window or tab >>Modular interconnection system for optical PCB and backplane communication
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2002 (English)In: Parallel and Distributed Processing Symposium., Proceedings International, IPDPS 2002, Abstracts and CD-ROM, Los Alamitos, Calif.: IEEE Press, 2002, p. 245-250Conference paper, Published paper (Refereed)
Abstract [en]

This paper presents a way of building modular systems with a powerful optical interconnection network. Each module, placed on a Printed Circuit Board (PCB), has a generic optical communication interface with a simple electronic router. Together with optical switching using micro-electromechanical system (MEMS) technology, packet switching over reconfigurable topologies is possible. The interconnection system gives the possibility to integrate electronics with optics without changing existing PCB technology. Great interest from industry is therefore expected and the cost advantages are several: reuse of module designs, module upgrades without changing the PCB, low-cost conventional PCB technology, etc. In the version described in this paper, the interconnection system has 48 bidirectional optical channels for intra-PCB communication on each board. For inter-PCB communication, a backplane with 192 bidirectional optical channels supports communication between twelve PCBs. With 2.5 Gbit/s per optical channel in each direction, the aggregated intra-PCB bit rate is 120 Gbit/s full duplex (on each PCB) while the aggregated inter-PCB bit rate is 480 Gbit/s full duplex. A case study shows the feasibility of the interconnection system in a parallel processing system for radar signal processing.

Place, publisher, year, edition, pages
Los Alamitos, Calif.: IEEE Press, 2002
Keywords
optical interconnection networks
National Category
Computer Engineering
Identifiers
urn:nbn:se:hh:diva-2760 (URN)10.1109/IPDPS.2002.1016665 (DOI)2-s2.0-84966564896 (Scopus ID)2082/3162 (Local ID)0-7695-1573-8 (ISBN)2082/3162 (Archive number)2082/3162 (OAI)
Conference
the 16th International Parallel and Distributed Processing Symposium, April 15-19, 2002, Ft. Lauderdale, Florida, USA
Note

©2002 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.

Available from: 2009-08-13 Created: 2009-08-13 Last updated: 2018-03-23Bibliographically approved
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