It is vital to accurately predict solar activity, in order to decrease the plausible damage of electronic equipment in the event of a large high-intensity solar eruption. Recently, we have proposed brain emotional learning-based fuzzy inference system (BELFIS) as a tool for the forecasting of chaotic systems. The structure of BELFIS is designed based on the neural structure of fear conditioning. The function of BELFIS is implemented by assigning adaptive networks to the components of the BELFIS structure. This paper especially focuses on the performance evaluation of BELFIS as a predictor by forecasting solar cycles 16-24. The performance of BELFIS is compared with other computational models used for this purpose, in particular with the adaptive neuro-fuzzy inference system. © 2018 IEEE.

The Harmonized Parabolic Synthesis methodology is a further development of the Parabolic Synthesis methodology for approximation of unary functions such as trigonometric functions, logarithms and the square root with moderate accuracy for ASIC implementation. These functions are extensively used in computer graphics, communication systems and many other application areas. For these high-speed applications, software solutions are in many cases not sufficient and a hardware implementation is therefore needed. The Harmonized Parabolic Synthesis methodology has two outstanding advantages: it is parallel, thus reducing the execution time, and it is based on low complexity operations, thus is simple to implement in hardware. A difference compared to other approximation methodologies is that it is a multiplicative and not additive, methodology. Compared to the Parabolic Synthesis methodologies it is possible to significantly enhance the performance in terms of reducing chip area, computation delay and power consumption. Furthermore it increases the possibility to tailor the characteristics of the error, improving conditions for subsequent calculations and the performance in design terms. To evaluate the proposed methodology, the fractional part of the logarithm has been implemented and its performance is compared to the Parabolic Synthesis methodology. The comparison is made with 15-bit resolution. The design implemented using the proposed methodology performs 3x better than the Parabolic Synthesis implementation in terms of throughput. In terms of energy consumption, the new methodology consumes 90% less. The chip area is 70% smaller than for the Parabolic Synthesis methodology. In summary, the new technology further increases the advantages of Parabolic Synthesis. © 2017 The Author(s)

The future trend in microprocessors for the more advanced embedded systems is focusing on massively parallel reconfigurable architectures, consisting of heterogeneous ensembles of hundreds of processing elements communicating over a reconfigurable interconnection network. However, the mastering of low-level micro-architectural details involved in programming of such massively parallel platforms becomes too cumbersome, which limits their adoption in many applications. Thus there is a dire need of an approach to produce high-performance scalable implementations that harness the computational resources of the emerging reconfigurable platforms.This paper addresses the grand challenge of accessibility of these diverse reconfigurable platforms by suggesting the use of a high-level language, occam-pi, and developing a complete design flow for building, compiling, and generating machine code for heterogeneous coarse-grained hardware. We have evaluated the approach by implementing complex industrial case studies and three common signal processing algorithms. The results of the implemented case-studies suggest that the occam-pi language based approach, because of its well-defined semantics for expressing concurrency and reconfigurability, simplifies the development of applications employing run-time reconfigurable devices. The associated compiler framework ensures portability as well as the performance benefits across heterogeneous platforms.

In applications as in future MIMO communication systems a massive computation of complex matrix operations, such as QR decomposition, is performed. In these matrix operations, the functions roots, inverse and inverse roots are computed in large quantities. Therefore, to obtain high enough performance in such applications, efficient algorithms are highly important. Since these algorithms need to be realized in hardware it must also be ensured that they meet high requirements in terms of small chip area, low computation time and low power consumption. Power consumption is particularly important since many applications are battery powered.For most unary functions, directly applying an approximation methodology in a straightforward way will not lead to an efficient implementation. Instead, a dedicated algorithm often has to be developed. The functions roots, inverse and inverse roots are in this category. The developed approaches are founded on working in a floating-point format. For the roots functions also a change of number base is used. These procedures not only enable simpler solutions but also increased accuracy, since the approximation algorithm is performed on a mantissa of limited range.As a summarizing example the inverse square root is chosen. For comparison, the inverse square root is implemented using two methodologies: Harmonized Parabolic Synthesis and Newton-Raphson method. The novel methodology, Harmonized Parabolic Synthesis (HPS), is chosen since it has been demonstrated to provide very efficient approximations. The Newton-Raphson (NR) method is chosen since it is known for providing a very efficient implementation of the inverse square root. It is also commonly used in signal processing applications for computing approximations on fixed-point numbers of a limited range. Four implementations are made; HPS with 32 and 512 interpolation intervals and NR with 1 and 2 iterations. Summarizing the comparisons of the hardware performance, the implementations HPS 32, HPS 512 and NR 1 are comparable when it comes to hardware performance, while NR 2 is much worse. However, HPS 32 stands out in terms of better performance when it comes to the distribution of the error.

The Parabolic Synthesis methodology is an approximation methodology for implementing unary functions, such as trigonometric functions, logarithms and square root, as well as binary functions, such as division, in hardware. Unary functions are extensively used in baseband for wireless/wireline communication, computer graphics, digital signal processing, robotics, astrophysics, fluid physics, games and many other areas. For high-speed applications as well as in low-power systems, software solutions are not sufficient and a hardware implementation is therefore needed. The Parabolic Synthesis methodology is a way to implement functions in hardware based on low complexity operations that are simple to implement in hardware. A difference in the Parabolic Synthesis methodology compared to many other approximation methodologies is that it is a multiplicative, in contrast to additive, methodology. To further improve the performance of Parabolic Synthesis based designs, the methodology is combined with Second-Degree Interpolation. The paper shows that the methodology provides a significant reduction in chip area, computation delay and power consumption with preserved characteristics of the error. To evaluate this, the logarithmic function was implemented, as an example, using the Parabolic Synthesis methodology in comparison to the Parabolic Synthesis methodology combined with Second-Degree Interpolation. To further demonstrate the feasibility of both methodologies, they have been compared with the CORDIC methodology. The comparison is made on the implementation of the fractional part of the logarithmic function with a 15-bit resolution. The designs implemented using the Parabolic Synthesis methodology – with and without the Second-Degree Interpolation – perform 4x and 8x better, respectively, than the CORDIC implementation in terms of throughput. In terms of energy consumption, the CORDIC implementation consumes 140% and 800% more energy, respectively. The chip area is also smaller in the case when the Parabolic Synthesis methodology combined with Second-Degree Interpolation is used. © 2016 Elsevier B.V. All rights reserved.

This paper briefly describes how the neural structure of fear conditioning has inspired to develop a computational intelligence model that is referred to as the brain emotional learning-inspired model (BELIM). The model is applied to predict long step ahead of solar activity and geomagnetic storms. © Copyright 2015, Association for the Advancement of Artificial Intelligence (www.aaai.org). All rights reserved.

Accurate prediction of solar activity as one aspect of space weather phenomena is essential to decrease the damage from these activities on the ground based communication, power grids, etc. Recently, the connectionist models of the brain such as neural networks and neuro-fuzzy methods have been proposed to forecast space weather phenomena; however, they have not been able to predict solar activity accurately. That has been a motivation for the development of the connectionist model of the brain; this paper aims to apply a connectionist model of the brain to accurately forecasting solar activity, in particular, solar cycle 24. The neuro-fuzzy method has been referred to as the brain emotional learning-based recurrent fuzzy system (BELRFS). BELRFS is tested for prediction of solar cycle 24, and the obtained results are compared with well-known neuro-fuzzy methods and neural networks as well as with physical-based methods. @2015 IEEE

Embedded electronic systems are finding increased applications in our daily life. In order to meet the application demands in embedded systems, parallel computing is used. This paper emphasizes teaching of the specific issues of parallel computing that are critical to embedded systems. We propose an analytical approach to deliver declarative and functioning knowledge for learning in the field of computer science and engineering with a special focus on Embedded Parallel Computing (EPC). We describe the teaching of a course with a focus on how parallel computing can be used to enhance performance and improve energy efficiency of embedded systems. The teaching methods include interactive lectures with web-based course literature, seminars, and lab exercises and home-assigned practical tasks. Further, the course is intended to give a general insight into current research and development in regard to parallel architectures and computation models. Since the course is an advanced level course, the students are expected to have a basic knowledge about the fundamentals of computer architecture and their common programming methodologies. The course puts emphasis on hands-on experience with embedded parallel computing. Therefore it includes an extensive laboratory and project part, in which a state of the art manycore embedded computing system is used. We believe that undertaking these methods in succession will prepare the students for both research as well as professional career. © 2015 ACM.

This paper introduces a new type of brain emotional learning inspired models (BELIMs). The suggested model is  utilized as a suitable model for predicting geomagnetic storms. The model is known as BELPM which is an acronym for Brain Emotional Learning-based Prediction Model. The structure of the suggested model consists of four main parts and mimics the corresponding regions of the neural structure underlying fear conditioning. The functions of these parts are implemented by assigning adaptive networks to the different parts. The learning algorithm of BELPM is based on the steepest descent (SD) and the least square estimator (LSE). In this paper, BELPM is employed to predict geomagnetic storms using the Disturbance Storm Time (Dst) index. To evaluate the performance of BELPM, the obtained results have been compared with the results of the adaptive neuro-fuzzy inference system (ANFIS). © 2014 Polish Information Processing Society.

This paper highlights the collaboration between industry and academia in research. It describes more than two decades of intensive development and research of new hardware and software platforms to support innovative, high-performance sensor systems with extremely high demands on embedded signal processing capability. The joint research can be seen as the run before a necessary jump to a new kind of computational platform based on parallelism. The collaboration has had several phases, starting with a focus on hardware, then on efficiency, later on software development, and finally on taking the jump and understanding the expected future. In the first part of the paper, these phases and their respective challenges and results are described. Then, in the second part, we reflect upon the motivation for collaboration between company and university, the roles of the partners, the experiences gained and the long-term effects on both sides. Copyright © 2014 ACM.